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0000003717 21S 2SWS UE Exercise to FPGA Based Detector Signal Processing   Hilfe Logo

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Exercise to FPGA Based Detector Signal Processing 
0000003717
exercise
2
Summer semester 2021
... alle LV-Personen
Chair of Physics I (E18) - (Prof. Paul)
(Contact information)
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Allocations: 1 
Angaben zur Abhaltung
Detector data acquisition and online signal processing with programmable logic / field programmable gate arrays (FPGAs).
- Introduction to the FPGA design process (modeling, simulation, synthesis, Xilinx design tools)
- Introduction to the VHDL hardware description language (modularity, concurrent/sequential statements, synchronous/asynchronous logic)
- Electronic design with VHDL and FPGAs (pipelined data processing, data flow control, counters, state machines)
- Signal processing basics (signal sampling, FFT, digital filters)
- Detector readout concepts (analog pipeline ASICs, sampling ADCs)
- Debug and measurement equipment (oscilloscope, logic analyzer)
- Design of a data acquisition system based on Xilinx FPGAs for a particle detector. (frontend ASIC configuration and readout, signal baseline correction, trigger decision, amplitude detection, ...)
The course is divided into a lecture part and an applied laboratory part. The basic theory is covered by the lecture which can be applied immediately to the design software in the laboratory part. The different tasks for the final data acquisition project are shared between the students and can be implemented besides the course.
The Xilinx FPGA design software is also available for installation on student laptops.
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  • English
  • German
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Für die Anmeldung zur Teilnahme müssen Sie sich in TUMonline als Studierende*r identifizieren.
Zusatzinformationen
Online information
e-learning course (moodle)
[LV-Evaluation:PH,via=0000001759]
Dozenten: Dipl.-Ing. Igor Konorov, Dipl.-Ing. Alexander Mann